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ld- 18714a-1 thee specification sheets are the propr ietary product of sharp corporat ion(?sharp) and include materials protected under copyright of sharp. do not reproduce or cause any third party to reproduce them in any form or by any means, electronic or mechanical, for any purpose, in whole or in part, without the express written permission of sharp. in case of using the device for applications such as control and safety equipment for transportation(aircraft, trains, automobiles, etc. ), rescue and security equipment and various safety related equipment which require higher reliability and safety, take into consideration that appropriate measur es such as fail-safe functions and redundant system design should be taken. do not use the device for equipment that requires an extr eme level of reliability, such as aerospace applications, telecommunication equipment(trunk lines), nuclear power control equipment and medical or other equipment for life support. sharp assumes no responsibility for any damage resulting from the use of the device which does not comply with the instructions and the precautions specified in these specification sheets. this specification sheet is to guarantee the quality of the lcd module itself, only should you need to evaluate and confirm the performance of the module, please do so when the lcd module is assembled into your finished product. if any problem occurs in relation to the description of this specification, it shall be resolved through discussion with spirit of cooperation. contact and consult with a sharp sales representative for any questions about this device. www..net www..net
ld- 18714a-2 table of contents 1. application 2. overview 3. mechanical specifications 4. input terminals 4-1. tft-lcd panel driving 4-2 lvds interface block diagram 5. absolute maximum ratings 6. electrical characteristics 6-1.tft-lcd panel driving 6-2. backlight driving 6-3. lvds input specification 6-3-1. ac characteristics 6-3-2.lvds data 7. timing characteristics of input signals 7-1. timing characteristics 7-2. display position 7-3. input data signals and display position on the screen 8. input signals, basic display colo rs and gray scale of each color 9. optical characteristics 10. display quality 11 } handling precautions 12. packing form 13. reliability test items 14. label 15. rohs regulations fig1 packing form fig.2 outline dimensions www..net www..net
ld- 18714a-3 1. application this technical literature applies to a color tft-lcd module, LQ106K1LA03. 2. overview this module is a color active matrix lcd module incor porating amorphous silicon tft (thi n film transistor). it is composed of a color tft-lcd panel, driver ics, control circ uit and power supply circuit and a backlight unit. graphics and texts can be displayed on a 12803768 dots panel with 262,144 colors by using lvds (l ow v oltage d ifferential s ignaling) to interface and s upplying +3.3v dc supply vo ltage for tft-lcd panel driv ing and supply voltage for backlight. in this tft-lcd panel , low reflection / color filters of ex cellent color performance and backlights of high brightness are incorporated to realize brighter and clearer pictures, making this model optimum for use in multi-media applications. optimum viewing direction is 6 o'clock. white-led backlight-driving dc/dc converter is not built in this module. 3. mechanical specifications parameter specifications unit display size 27 (10.6") diagonal cm active area 230.4(h)138.2 (v) mm 1280 (h)768 (v) pixel pixel format (1 pixel = r+g+b dots) aspect ratio 15 : 9 pixel pitch 0.180 (h)0.180 (v) mm pixel configuration r,g,b vertical stripe display mode normally white surface treatment glare and hard-coating 2h low reflection parameter min. typ. max. unit width 250.1 250.6 251.1 mm height 151.5 152.0 152.5 mm unit outline dimensions [note 1] depth 5.0 mm mass 175 190 g [note 1] excluding the projection part. outline dimensions is shown in fig.2 www..net www..net
ld- 18714a-4 4. input terminals 4-1. tft-lcd panel driving cn1 (lvds signals and +3.3v dc power supply) pin no. symbol function remark 1 v cc +3.3v power supply 2 v cc +3.3v power supply 3 gnd 4 gnd 5 rxin0- receiv er signal of lvds ch0 (-) [note 1] 6 rxin0+ receiver signal of lvds ch0 (+) [note 1] 7 rxin1- receiv er signal of lvds ch1 (-) [note 1] 8 rxin1+ receiver signal of lvds ch1 (+) [note 1] 9 rxin2- receiv er signal of lvds ch2 (-) [note 1] 10 rxin2+ receiver signal of lvds ch2 (+) [note 1] 11 ck in- receiver signal of lvds clk (-) [note 1] 12 ck in+ receiver signal of lvds clk (+) [note 1] 13 gnd 14 led_l1 white-led b/l cathode 1 15 led_l2 white-led b/l cathode 2 16 led_l3 white-led b/l cathode 3 17 led_l4 white-led b/l cathode 4 18 led_l5 white-led b/l cathode 5 19 n.c n.c [note 3] 20 led_h white-led b/l anode [note 1] relation between rxini(i=0,1,2) and actual data is shown in following section (4-2)(7-2). [note 2] the shielding case is connected with signal gnd. [note 3] please use nc by open. nc terminal is not connected with the internal circuit. using connector : df19l-20p-1h (hirose) corresponding connecto r : df19-20s-1c(hirose) (sharp is not responsible to its product quality, if the user applies a connector not corresponding to the above model.) www..net www..net
ld- 18714a-5 4-2 lvds interface block diagram lvds receiver : single lvds interface contained in a control ic corresponding transmitter : thc63lvdm63a (thine) or equivalent txin12 ? txin17 txin 0 ? txin 5 txin 6 ? txin11 r0 ? r5 b0 ? b5 hsync vsync enab g0 ? g5 txin18 txin19 txin20 6 6 6 controller parallel ttl to lvds pll clk txclk in computer side rin0+(6) rin0-(5) lvds to parallel ttl pll single lvds rin1+(8) rin1-(7) rin2+(10) rin2-(9) clkin+(12) clkin-(11) 6 6 6 rxout12 ? rxout17 rxout18 rxout19 rxout20 rxout 0 ? rxout 5 rxout 6 ? rxout11 r0 ? r5 b0 ? b5 hsync vsync enab g0 ? g5 internal circuit rxclk out ck1 cn1 signal name (terminal no.) tft lcd side www..net www..net
ld- 18714a-6 5. absolute maximum ratings ratings parameter symbol condition min. max. unit remark input voltage v i ta=25 ? -0.3 vcc+0.3 v [note 1] +3.3v supply voltage v cc ta=25 ? 0 +4.0 v led forward current i led ta=25 ? 0 30 ma led reverse voltage v led_r ta=25 ? 5 v storage temperature tstg -20 +60 ? operating temperature (ambient) topa 0 +50 ? [note 2] [note 1] lvds signals [note 2] humidity 95%rh max. at ta ? +40 ? . maximum wet-bulb temperature at +39 ? or less at ta>+40 ? . no condensation. 6. electrical characteristics 6-1.tft-lcd panel driving ta 1 25 ? parameter symbol min. typ. max. unit remark supply voltage vcc +3.0 +3.3 +3.6 v [note 2] current dissipation icc 310 500 ma [note 3] permissive input ripple voltage v rp 100 mv p-p vcc = +3.3v input voltage range v i 0 2.4 v lvds signals differential input high v th +100 mv v cm = +1.2v threshold voltage low v tl ?100 mv [note 1] input current (high) i oh 10 a v i = +2.4v vcc = +3.6v input current (low) i ol 10 a v i = 0v vcc = 3.6v terminal resistor r t 100
differential input [note 1] v cm : common mode voltage of lvds driver. www..net www..net
ld- 18714a-7 [note 2] on-off conditions for supply voltage symbol min. max. unit remark t1 0 10 ms t2 0 100 ms t3 0 50 ms t4 0 400 ms t5 200 ms t6 180 ms *1 t7 5 ms *1 *1 : as for the power sequence for backlight, it is recommended to apply above mentioned input timing. if the backlight is lit on and off at a timing other than shown above, displaying image may get disturbed. this is due to variation of output signal from timing generator when lvds signal is changed from on to off or vice versa, but has no harm to the module itself. [note] do not keep the interface signal high-imp edance or unusual signal when power is on. vcc-dip conditions 1) 2.5 v ? vcc ? 3.0 v td ? 10 ms under above condition, the display image should return to an appropriate figure after vcc voltage recovers. 2) vcc ? 2.5 v vcc-dip conditions should also follow the on-off conditions fo r supply voltage [note 3] typical current situation : 16-gray-bar pattern. vcc=+3.3v,clock frequency 81mhz 7dd ue } + } + 3(# (4 3(# (4 3(# (4 3(# (4 3(# (4 t1 t2 t6 0.9vcc 0.9vcc vcc valid backlight signal (lvds interface) 0.1vcc 0.1vcc 0.1vcc t3 t5 off off backlight on t7 t4 www..net www..net
ld- 18714a-8 6-2. backlight driving the backlight system is edge-lighting type with 45 white-led(white light emitting diode). the characteristics of white-led are shown in the fo llowing table. (ta=25 o c) parameter symbol min. typ. max. unit remark led voltage v l 28.8 31.5 v led current range v l 2 17 17 ma value for one string number of circuit strings 5 [note 1] led power consumption w l 2.45 w [note 2] [note 1] the led backlight is composed by 5 strings from which 9 led is connected with the series. the figure below shows the circuit chart of each string. in each circuit, there is a ceramic capacitor for the electrostatic protection. [note 2] calculated value for reference ( i l v l ) -&%@) -&%@- -&%@- -&%@- -&%@- -&%@- ceramic capacitor 0.1uf/b white led45 www..net www..net
ld- 18714a-9 6-3. lvds input specification 6-3-1. ac characteristics vcc=+3.0v ? +3.6v | ta 1 0 ?? +50 ? parameter symbol min typ. max. unit input data position 0 (trcip=15.38ns) t rip1 -0.25 0.0 +0.25 ns input data position 1 (trcip=15.38ns) t rip0 t rcip /7-0.25 t rcip /7 t rcip /7+0.25 ns input data position 2 (trcip=15.38ns) t rip6 2 t rcip /7-0.25 2 t rcip /7 2 t rcip /7+0.25 ns input data position 3 (trcip=15.38ns) t rip5 3 t rcip /7-0.25 3 t rcip /7 3 t rcip /7+0.25 ns input data position 4 (trcip=15.38ns) t rip4 4 t rcip /7-0.25 4 t rcip /7 4 t rcip /7+0.25 ns input data position 5 (trcip=15.38ns) t rip3 5 t rcip /7-0.25 5 t rcip /7 5 t rcip /7+0.25 ns input data position 6 (trcip=15.38ns) t rip2 6 t rcip /7-0.25 6 t rcip /7 6 t rcip /7+0.25 ns phase lock loop set t rpll 10 ms input clock period t rcip 14.9 15.4 20 ns lvds input timing lvds phase lock loop set 6-3-2.lvds data i=0,1,2 t rcip ck in+/- v diff =0 v diff =0 t rip1 t rip0 t rip6 t rip5 t rip4 t rip3 t rip2 rxini6 rxini5 rxini4 rx ini3 rxini2 rxini1 rxini0 rxini6 rxini5 rx ini4 rxini3 rx ini2 rxini1 rxini+/- ck in+/- r4? r3? r2? r1? r0? g0 r5 r4 r3 r2 r1 r0 g0? rxin0+/- g5 ? g4? g3? g2? g1? b1 b0 g5 g4 g3 g2 g1 b1? rxin1+/- hsync b5? b4? b3? b2? enab hsync vsync b5 b4 b3 b2 enab? rxin2+/- previous cycle current cycle t note vdiff= ( rxini+ ) - ( rxini- ) | ( ck in+ ) - ( ck in- ) 3.0v t rpll vcc ck in+/- pllclk 2.0v v diff =0v www..net www..net
ld- 18714a-10 7. timing characteristics of input signals 7-1. timing characteristics (this is specified at digital outputs of lvds driver.) (vertical) item (symbol) min. typ. max. unit remark vsync cycle (t va ) - 16.7 - ms negative 800 802 900 line blanking period (t vb ) 32 34 132 line sync pulse width (t vc ) 2 6 - line sync pulse width + back porch(t vc +t vd ) 31 31 31 line active display area (t ve ) 768 768 768 line front porch (t vf ) 1 3 - line (horizontal) item (symbol) min. typ. max. unit remark hsync cycle (t ha ) 20.26 20.8 24.70 us positive 1652 1688 1856 clock blanking period (t hb ) 372 408 576 clock sync pulse width (t hc ) 2 112 - clock sync pulse width + back porch (t hc + t hd ) 4 360 t ha -1280 clock active display area (t he ) 1280 1280 1280 clock (clock) item (symbol) min. typ. max. unit remark frequency 70 81 85 mhz [note1] [note1] in case of lower frequency, the deterioration of display quality, flicker etc., may be occurred. (hsync-vsync phase difference) item (symbol) min. typ. max. unit remark hsync-vsync phase difference (t hv )1 - t ha -t hc clock vs y nc hs y nc )ps
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ld- 18714a-11 (hsync-enab phase difference) item min. typ. max. unit remark hsync-enab phase difference (t hn ) 0 - 376 clock 7-2. display position item standards beginning ending unit remark horizontal rising edge of enab 0 1280 clock falling edge of hsync 360 1640 clock [note 1] vertical falling edge of vsync 31 799 clock [note 1] enab signal must be fixed to low. [note] (horizontal display direction) when enab is fixed low, 360 clocks are counted from hs ync negative edge and data from after are available. if you need other timing, please use enab signal. (vertical display direction) 31 lines are counted from vsync negative edge and data from next line are available. (enab signal) enab could not be used for the purpose of the vertical display start timing. caution image will not be displayed on the right position otherwise. 7-3. input data signals and display position on the screen 1 ~ 1 1 ~ 2 ~ 2 ~ 1 2 ~ 2 3 ~ 1 768 k 1 1 k 1280 r g b 768 k 1280 r1 g1 b1 r2 g2 b2 (1,1) (1,2) display position of input data(v ~ h) enab hs y nc t hn www..net www..net
ld- 18714a-12 8. input signals, basic display colo rs and gray scale of each color colors & data signal gray scale gray scale r0 r1 r2 r3 r4 r5 g0 g1 g2 g3 g4 g5 b0 b1 b2 b3 b4 b5 black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 blue 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 green 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 cyan 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 red 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 magenta 1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1 yellow 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 white 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 black gs0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 a gs1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 darker gs2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 a ? ? ? ? ? ? ? ? ? brighter gs61 1 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 ? gs62 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 red gs63 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 black gs0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 a gs1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 darker gs2 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 a ? ? ? ? ? ? ? ? ? brighter gs61 0 0 0 0 0 0 1 0 1 1 1 1 0 0 0 0 0 0 ? gs62 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0 green gs63 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 black gs0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 a gs1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 darker gs2 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 a ? ? ? ? ? ? ? ? ? brighter gs61 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 ? gs62 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 blue gs63 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 0 : low level voltage, 1 : high level voltage each basic color can be displayed in 64 gray s cales from 6 bit data signals. a ccording to the combination of total 18 bit data signals, the 262,144-color display can be achieved on the screen. basic color gray scale of red gray scale of green gray scale of blue www..net www..net
ld- 18714a-13 9. optical characteristics ta=+25 ? , vcc=+3.3v parameter symbol condition min. typ. max. unit remark horizontal 21, 22 60 70 deg. 11 40 50 deg. viewing angle range vertical 12 cr>10 50 60 deg. [note 1,3,6] crn =0 ? 150 contrast ratio cro optimum viewing angle 150 350 [note 2,4,6] response time r+ d 35 ms [note 2,5,6] x 0.263 0.313 0.363 chromaticity of white y =0 ? 0.279 0.329 0.379 [note 2,6] luminance of white y li 210 300 cd/m 2 i f =15ma [note 2,7] white uniformity w 1.45 [note 2,8] t the measurement shall be executed 30 minutes after lighting at rating. condition : (i f =17ma) the optical characteristics shall be measured in a dark room or equivalent. [note 1] measuring viewing angle range [note 2] other measurements -$%1bofm &;dpousbtu3) &-%*.
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ld- 18714a-14 [note 3] definitions of viewing angle range: [note 4] definition of contrast ratio: the contrast ratio is defined as the following. contrast ratio (cr) 1 [note 5] definition of response time: the response time is defined as the following figure and shall be measured by switching the input signal for "black" and "white" . [note 6] this shall be measur ed at center of the screen. [note 7] average of five point.(a~e) [note 8] definition of white uniformity: white uniformity is defined as the following with five measurements (a ? e). 10. display quality the display quality of the color tft-lcd module shall be in compliance with the incoming inspection standard. luminance (brightness) with all pixels white luminance (brightness) with all pixels black maximum luminance of five points (brightness) minimum luminance of five points (brightness) x1 qjyfmt qjyfmt www..net www..net
ld- 18714a-15 11 } handling precautions a) be sure to turn off the power supply when inserting or disconnecting the cable. b) be sure to design the cabinet so that the module can be installed without any extra stress such as warp or twist. c) since the front polarizer is easily damaged, pay attention not to scratch it. d) wipe off water drop immediately. long contact with water may cause discoloration or spots. e) when the panel surface is soiled, wipe it with absorbent cotton or other soft cloth. f) since the panel is made of glass, it may break or crac k if dropped or bumped on hard surface. handle with care. g) since cmos lsi is used in this module, take care of static electricity and injure the human earth when handling. observe all other precautionary requirements in handling components. h) this module has its circuitry pcbs on the rear side and should be handled carefully in order not to be stressed. i) protect sheet is attached to the module surface to prevent it from being scratched. peel the sheet off slowly just before the use with strict attention to electrostatic charges. ionized air shall be blown over during the action. blow off the 'dust' on the polarizer by using an ionized nitrogen gun, etc.. j) do not expose the lcd module to a direct sunlight, for a long period of time to protect the module from the ultra violet ray. k) connect gnd of mounting holes to stabilize against emi and external noise. l) when handling lcd modules and assembling them into cabinets, please be noted that long-term storage in the environment of oxidization or deoxidization gas and the use of such materials as reagent, solvent, adhesive, resin, etc. which generate these gasses, may cause corrosion and discoloration of the lcd modules. m) adjusting volume have been set optimally before shipment, so do not change any adjusted value. if adjusted value is changed, the specification may not be satisfied. n) disassembling the module can cause permanent damage and should be strictly avoided. o) please be careful since image retention may occur when a fixed pattern is displayed for a long time. 12. packing form piling number of cartons max.6 package quantity in one carton 20 pcs carton size 397(w)313(d)303(h) mm total mass of one carton filled with full modules 5.0kg packing form fig1 www..net www..net
ld- 18714a-16 13. reliability test items no. test item conditions 1 high temperature operation test ta = +50 ? 240h (panel-surface temperature is +60 ? max.) 2 low temperature operation test ta = 0 ? 240h 3 high temperature storage test ta = +60 ? 240h 4 low temperature storage test ta = -20 ? 240h 5 high temperature & high humidity operation test ta = +40 ? ; 90 %rh 240h (no condensation) 6 shock test (non- operating) max. gravity : 490 m/s 2 pulse width : 11 ms, sine wave direction : ? x, ? y, ? z once for each direction. 7 vibration test (non- operating) frequency : 10 ? 57hz/vibration width (one side):0.075mm : 57 ? 500hz/gravity:9.8m/s 2 sweep time : 11 minutes test period : 3 hours (1 hour for each direction of x,y,z) [result evaluation criteria] under the display quality test conditions with normal operation state, these shall be no change, which may affect practical display function. [normal operation stat e] temperature : +15 ? +35 ? , humidity : 45 ? 75 ? , atmospheric pressure : 86 ? 106kpa www..net www..net
ld- 18714a-17 14. label 1) module bar code label: notation: ? model no. ? sharp logo. ? manufacture country ? serial no. bar code: ? model no. ? serial no. ? patent no. !& ! bar code ? ('% "#%# ?. ? bar code ? ? ? ? ? ? one or more of u.s. patents xxxxxxx, xxxxxxx, kkk and xxxxxxx serial no. . a.d. production factory production months serial no. (production months) 1-9(jan.-sep.),x(oct.),y(nov.),z(dec) 2) packing bar code label notation/ bar code: ? model no. ? date ? quantity 15. rohs regulations this lcd module is compliant with rohs directive. carton mark to ? j (!& ! !>c # o } )}} &d0=c8ch& ?2b a?2 ? j bar code ? bar code ( ? bar code ? 3?? v;???pb{ ? ? ? carton mark (this side and other side) 5 www..net www..net
ld- 18714a-18 fig1 packing form www..net www..net
ld- 18714a-19 fig.2 outline dimensions www..net www..net

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